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Sharky Extreme : September 8, 2008





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Written by: Dean Kent : April 11th 1999

The PC architecture is comprised of a few basic pieces: The central processing unit, the memory subsystem, the I/O subsystem, and perhaps a graphics subsystem.



Most discussions about increasing performance focus on the CPU speed, and ignore the others. While it is true that increasing the CPU speed will improve performance to some degree, there is still the problem of getting data to and from main memory.

Notice that the memory controller sits between the CPU and the I/O subsystems (including graphics). You may (correctly) surmise from this that virtually all data and instructions must past through memory - both going into and out of the processor. If the processor must wait for the memory subsystem to deliver or write the data, processor cycles are being wasted and the overall performance gain of a faster processor is lessened.

To illustrate this point, let's investigate the operation of a system with a 500MHz processor coupled with 100MHz SDRAM. For the sake of simplicity, we will assume that the processor can execute an instruction every clock cycle, and the memory can transmit/receive data every clock cycle. We will also not consider other operations that the CPU may be required to handle. In this simplified example the CPU can handle 500 million instructions (and/or data) every second while the memory can only deliver 100 million per second. The end result is that 4 of every 5 CPU clock cycles are spent waiting for work. Even if the CPU does spend some time handling interrupts, controlling some I/O operations, etc. there is still an awful lot of time spent waiting for data.

Though very fast memories do exist (or could be developed) which would overcome this problem, the primary consideration for the PC is always cost. When investigating solutions for performance issues, designers must always consider what the additional costs will be, and whether the consumer will be willing to pay that cost. As a result, many otherwise superior technologies are bypassed in favor of those that give acceptable performance at a much lower cost.




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